PCB layout and routing
This is where the schematic becomes a PCB: placement, routing and copper pours decide EMC, signal quality and manufacturability. At MHD this step is done by hand in Altium, guided by experience from series production and instrumentation.
Placement and routing by hand
The position of the components alone determines how well a circuit can be routed. MHD places components by signal flow, thermal budget and how reliably the board can be assembled; the routing that follows is 100% manual. Two layouts of the same circuit are almost identical in ohmic terms yet behave completely differently in EMC and function: crossing bus lines, split reference planes or inhomogeneous differential pairs are still not detected reliably by any software.
Depending on the project, MHD also optimises the layer count or sets up an economical panelisation for manufacturing.
Impedance control
Many communication and measurement applications demand precisely matched impedances. The required trace width depends on layer stack-up and material and is defined together with your PCB fabricator.
- Microstrip and stripline: reference plane on one or both sides, continuous over the full signal length
- Agreed with the fabricator: widths and spacings to the actual cores and prepregs; for tight tolerances, fabricated and tested impedance-controlled
- Affected signals are identified by MHD in the schematic review, before routing starts
Length matching
Parallel buses to DDR or HyperRAM devices demand propagation delays matched down to the sub-millimetre range; depending on the device, tolerances lie between 100 mil (2.54 mm) and 10 mil (0.25 mm). MHD achieves this through device orientation, coordinated pin swapping and meanders.
Copper pours
At the power supply, the processor or the fieldbus connector, copper pours connect filter stages with minimal current loops, form reference planes under fast buses and carry heat away. On assembly layers MHD pays attention to thermal reliefs so that connected components remain properly solderable: otherwise, large areas of copper draw the heat out of the pad during soldering.
The outcome
Step 03 ends with a layout that passes your internal reviews and moves straight on to Step 04 (manufacturing data).
- Native Altium project with all source data
- EMC-compliant layout, checked for signal integrity and manufacturability
- Layer stack-up recommendation, agreed with the fabricator
- Project documentation for review and audit
PCB layout at MHD
The questions that come up most often in initial consultations about this step.
What format do you need my schematic in?
Ideally as an Altium project. MHD converts legacy data from Eagle, OrCAD, CADSTAR, PADS, P-CAD or Tango; a redesign can also be built from old Gerber data. Mention your format.
Does MHD use an autorouter?
Routing is 100% manual. The governing factors are signal integrity, length matching, thermal behaviour and susceptibility to interference.
How do you know which signals need impedance control?
From the schematic review before routing: there MHD identifies the affected signals and defines the trace geometry together with the material data from your PCB fabricator.
Can you work with my layer stack-up and my design guidelines?
Yes. MHD works to your CAD guidelines and with your preferred layer stack-up. If there is none yet, MHD provides a recommendation and agrees it with the fabricator.
How confidential is my circuit data?
Only what is needed for the layout is handed over; processor software and ASIC internals stay with you. If you wish, we sign a non-disclosure agreement (NDA) before any file exchange, and on request all communication is OpenPGP-encrypted.
Do you work as an external layout department for our development team?
Yes. Your engineers keep the circuit and the product; MHD takes on board routing, layout and manufacturing data to your guidelines, with a single point of contact and predictable response times.
Who does the routing when the partner network is involved?
The critical modules and the underlying design architecture stay with Dr Häuser. For volume and peak load we draw on selected design resources from the network, under the same specifications, reviews and releases.
What does a layout cost?
That depends on layer count, signal classes and component density. Describe task, quantity and deadline in your project enquiry, and you receive an initial assessment.
From schematic to layout
Step 03 is the entry point. You receive an initial assessment of your project.